Harmonic Resonance Protection in High-Voltage Power Supplies for Lithography Machines

As the core equipment of semiconductor manufacturing, the stability of the high-voltage power supply in lithography machines directly determines exposure accuracy and chip yield. The power supply provides energy for electron beam deflection systems and ion optics units, while load current changes at microsecond speeds (e.g., jumping from 10% to 90% rated load within 1μs) can induce harmonic resonance, causing voltage overshoot or undershoot. Studies show that a voltage deviation exceeding 50mV may lead to a 0.1nm electron beam landing error, sufficient to cause pattern distortion in sub-7nm processes. Thus, harmonic resonance protection is a critical challenge in high-voltage power supply design. 
Causes and Hazards of Harmonic Resonance
1. Generation Mechanism: 
   High-frequency switching devices (e.g., LLC resonant converters) and nonlinear loads (electron beam scanning systems) in lithography machines are primary sources of harmonics. Current ripple from phase interleaving in multi-phase topologies, rapid switching of power devices (GaN devices at picosecond speeds), and transient control loop responses can excite high-order harmonics (3kHz–30MHz). Resonance occurs when harmonic frequencies coincide with circuit natural frequencies, leading to localized energy accumulation. 
2. Critical Hazards: 
   • Precision Distortion: Voltage fluctuations exceeding 0.01% disrupt laser-induced tin droplet plasma generation in EUV lithography, causing dose inhomogeneity and linewidth variation. 
   • Equipment Damage: Resonant overvoltage (2–3× rated voltage) overloads capacitors, burns transformer windings, and accelerates thermal failure in SiC diodes. 
   • System Instability: Harmonics degrade phase margin in control loops, potentially triggering oscillations that invalidate adaptive digital control (e.g., MPC). 
Innovative Protection Technologies
1. Topology and Device Optimization: 
   • Multilevel Architecture: A 5-level ANPC topology divides 4000V high voltage into stepped levels, reducing single-switch stress. Combined with SiC MOSFETs, switching losses decrease by 70%, and output voltage harmonics drop by 50%. 
   • Magnetic Integration: Coupled inductor technology integrates transformers and resonant inductors into EE cores, utilizing consistent leakage inductance (<5% deviation) to suppress high-frequency oscillations and reduce parasitic parameters by 30%. 
2. Harmonic Suppression Techniques: 
   • Adaptive Filtering System: Combines passive filters (LC resonant circuits) for specific harmonics (e.g., 3rd/5th order) with active power filters (APF) that inject counter-phase currents to cancel broadband harmonics (3kHz–30MHz). This reduces THD below 1%. 
   • Amorphous Alloy Harmonic Protectors: Connected parallel to the power output, they employ low-pass filters and voltage clamping circuits to absorb pulse spikes and high-frequency noise, correcting distorted voltage waveforms—particularly effective against 50kHz pulses from laser-induced plasma. 
3. Control Algorithm Upgrades: 
   • Feedforward-Feedback Coordination: Feedforward channels detect load current changes (di/dt) to preempt harmonic trends and inject compensation currents. Feedback channels use sliding mode control (SMC) to force system convergence along predefined trajectories, cutting voltage recovery time to 35μs (40% faster than traditional PID). 
System Integration and Validation
• Low-Impedance Layout: Kelvin connections minimize PCB trace resistance, while 0.1μF ceramic capacitors at outputs cancel parasitic inductance, maintaining high-frequency impedance at mΩ levels. 
• Thermal-Electrical Co-Management: Microchannel liquid cooling limits GaN junction temperature fluctuation to <1°C (every 10°C rise increases on-resistance by 15%), preventing thermal drift-induced parameter shifts. 
• Testing Validation: Load step tests (90% jump within 0.5ms) and spectral analysis (phase margin >45°) ensure resonance suppression, meeting EUV’s 50,000-pulses/second stability requirements. 
Future Trends
For sub-3nm processes, high-voltage power supplies must achieve recovery times <10μs and overshoot <0.01%. Wide-bandgap devices (e.g., Ga₂O₃ MOSFETs rated at 8kV) and intelligent current-sharing (N+1 redundancy with <2% deviation) will be key breakthroughs, underpinning nanoscale lithography precision. 
Harmonic resonance protection marks the leap from usable to reliable in lithography power supplies. Multidisciplinary innovations integrating electromagnetic compatibility, thermal management, and control algorithms are essential to lay the energy foundation for nanoscale chip manufacturing.