Winding Interleaving and Interlayer Capacitance Optimization of Planar Transformer in High Voltage Power Supply
Planar transformers have become increasingly popular in high voltage power supplies due to their excellent thermal performance, consistent manufacturing quality, and suitability for high-frequency operation. The transformer design significantly affects the efficiency, electromagnetic interference, and high-frequency performance of the power supply. Winding interleaving and interlayer capacitance optimization are critical design techniques for achieving optimal planar transformer performance in high voltage applications.
Planar transformers use flat windings fabricated on printed circuit boards or copper stampings, assembled with ferrite cores to form the magnetic structure. The flat winding geometry provides several advantages over conventional wire-wound transformers. The thermal path from the windings to the core and the ambient environment is shorter and more consistent, improving heat dissipation. The manufacturing process produces highly repeatable winding geometry, ensuring consistent transformer characteristics. The planar structure is well-suited for automated assembly and integration with other circuit components.
The winding arrangement in a planar transformer affects both the leakage inductance and the interlayer capacitance. Leakage inductance represents the magnetic flux that does not couple between primary and secondary windings, causing energy loss and voltage spikes in switching applications. Interlayer capacitance represents the capacitive coupling between winding layers, affecting the high-frequency behavior and the common-mode noise transmission. These parameters are determined by the physical arrangement of the windings.
Winding interleaving is a technique that alternates primary and secondary winding layers to reduce leakage inductance. In a non-interleaved design, all primary layers are grouped together and all secondary layers are grouped together, maximizing the separation between primary and secondary. This arrangement results in high leakage inductance because much of the magnetic flux from the primary does not link to the secondary. In an interleaved design, primary and secondary layers are alternated, reducing the magnetic path length between windings and thus reducing leakage inductance.
The degree of interleaving affects the trade-off between leakage inductance and interlayer capacitance. More interleaving reduces leakage inductance but increases the interlayer capacitance between primary and secondary windings. The increased capacitance can couple high-frequency noise between the windings, potentially causing electromagnetic interference problems. The optimal interleaving strategy balances these competing effects for the specific application requirements.
High voltage applications present particular challenges for interlayer capacitance. The voltage difference between primary and secondary windings can be substantial, and the capacitive coupling can inject significant displacement current into the secondary circuit. This current can cause conducted electromagnetic interference and can affect the operation of sensitive circuits connected to the secondary. The interlayer capacitance must be minimized while maintaining acceptable leakage inductance.
The winding layer order affects both the capacitance and the voltage stress on the insulation. Adjacent layers with large voltage differences have higher capacitive coupling and require thicker insulation. The layer order can be optimized to minimize the voltage difference between adjacent layers, reducing both the capacitance and the insulation stress. This optimization must consider the voltage waveform on each layer during operation.
Insulation materials between layers affect both the capacitance and the isolation capability. Materials with lower dielectric constant reduce the capacitance for a given layer spacing. Materials with higher dielectric strength allow thinner insulation for a given voltage rating, but the thinner insulation increases capacitance. The selection of insulation materials must balance these competing requirements. The insulation must also be compatible with the manufacturing process and the operating temperature range.
The parasitic capacitance within each winding also affects the transformer performance. The capacitance between turns within a layer and between adjacent layers of the same winding creates a distributed capacitive network. This capacitance can resonate with the leakage inductance, causing high-frequency oscillations that affect the switching waveforms. The winding geometry can be optimized to minimize these internal capacitances.
Finite element analysis enables detailed modeling of the magnetic and electric field distribution in planar transformers. The analysis can predict the leakage inductance and interlayer capacitance for different winding arrangements. Parametric studies can explore the design space and identify optimal configurations. The analysis results guide the physical design of the transformer before prototyping.
Measurement and characterization verify the transformer performance and validate the design models. Impedance analyzers can measure the leakage inductance and interlayer capacitance over frequency. Time-domain measurements can characterize the switching waveforms and identify any resonance issues. Comparison of measured and predicted results refines the models for future designs. The characterization results also support quality control during production.
